Available Technology

XML Translator for Interface Descriptions

This software addresses the inconsistency in the interface implementation between FPGAs and software commonly results in difficult to test, identify, and fix failures in NASA Space flight systems. The tool forces functionally identical interface implementations on both sides of the interface. The XML Parser is a program that produces header files in C, Verilog, and VHDL that describe an FPGA interface. These header files are created from an XML file describing the interface, and they define constants that allow a programmer to use each register and to access each individual field in the register. The XML Parser is run as part of the make process, which ensures that whenever an interface is changed, all of the code that uses the header files describing it is recompiled.
Internal Laboratory Ref #: 
NPO-46447-1
Patent Status: 
U.S. Government Purpose Release
Agency
NASA
Region
Far West
State: 
California
Lab Representatives
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